1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a data output circuit of a semiconductor device, which may prevent an occurrence of overlapping.
2. Description of the Related Art
FIG. 6 is a block diagram showing a conventional data output circuit of a semiconductor device.
Referring to FIG. 6, a conventional data output circuit of a semiconductor device includes a pre-driver 60 configured to output pull-up and pull-down control signals S1 and S2 in response to input data IN_DATA, a PMOS transistor PM configured to be turned on and off by the pull-up control signal S1 and output a power supply voltage VDD to an output terminal DQ, and an NMOS transistor NM configured to be turned on and off by the pull-down control signal S2 and output a ground voltage VSS to the output terminal DQ.
Describing operations of the conventional data output circuit of a semiconductor device, when there is no input data IN_DATA, the pre-driver 60 outputs the pull-up and pull-down control signals S1 and S2 respectively at a logic high level and a logic low level, turns off the transistors PM and NM, and disables the output terminal DQ, e.g., in a floating state.
If the input data IN_DATA of a logic high level is inputted, the pre-driver 60 outputs and applies both the pull-up and pull-down control signals S1 and S2 of logic low levels to the respective transistors PM and NM and turns on only the PMOS transistor PM such that the power supply voltage VDD is outputted to the output terminal DQ.
If the input data IN_DATA of a logic low level is inputted, the pre-driver 60 outputs and applies both the pull-up and pull-down control signals S1 and S2 of logic high levels to the respective transistors PM and NM and turns on only the NMOS transistor NM such that the ground voltage VSS is outputted to the output terminal DQ.
However, in the conventional data output circuit of a semiconductor device, in the case that the input data IN_DATA are consecutively inputted and the number of bits thereof increases, the pull-up and pull-down transistors PM and NM are to switch between turning on and off in shortened time, and an overlapping phenomenon, in which through current is produced between the power supply voltage VDD and the ground voltage VSS, may occur. As a consequence, power loss may result and an output-side circuit is likely to misoperate.